Forza Silicon to Present its BDA's FastSPICE-based Design Methodology

Business Wire: Daniel Van Blerkom, Forza Silicon CTO, and Ravi Subramanian, Berkeley Design Automation CEO, will jointly present a paper titled "An Efficient and Accurate Sign-Off Simulation Methodology for High-Performance CMOS Image Sensors" at the TSMC Open Innovation Platform Ecosystem Forum today in San Jose, CA. Forza Silicon uses the Analog FastSPICE (AFS) Platform from Berkeley Design Automation for circuit verification and sign-off validation of CMOS image sensors. The simulation methodology developed by Forza Silicon with the AFS Platform uses a hierarchy of models for the image sensor blocks. The complexity of the model is reduced at higher levels of the hierarchy, while still achieving maximum accuracy of the global interactions between blocks.

"With the ability to tailor our model complexity for a desired simulation, we gain the advantage of rapid, accurate validation while keeping simulation time and resources manageable," said Dr. Daniel Van Blerkom.

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